Use of Structur orderly dispositio...

Use of Structur orderly dispositions for Real-Time Peripheral Firmware

PRODUCTIVITY AND regards about quality may seem to be opposing universals when product development time is short. However, with planning, the accurate tools and a good progressive growth method, productivity and quality objectives can be achieved and still suitable the time-to-market goals. In the progressive growth of the HP 9145A Cartridge Tape Drive at HP Computer Peripherals Bristol Division (CPB) the firmware was always upon the critical path during the entire consequence development time. We had to about reliable prototypes of the HP 9145A for testing with the target machines undivided year after the project start date. We realized at the beginning of the exhibit that if we used the firmware increase process we had at the time, we could not fitting the schedule and still bring into being a quality product. any of the problems we had in our increase process at the time included:

* Total reliance forward text for firmware specifications. There were same few graphical representations for the scheme architecture, data, and module organizations.

* Firmware testing was different for each contrive and the effectiveness of testing was not measured. Also, there was no overall ordeal planning process.

* make objection for the number of noncomment source statements (NCCS) no metrics were collected

* Tool support consisted of emulation, source digest control and editing on HP 64000 Logic progress to maturity Systems. There were an tools for text documentation and structur design which existed forward a variety of systems. Improvements were made to our growth process in the areas of planning, meanss (analysis, design, and testing), and metrics (proces measurement). The greatest in quantity significant changes involved the use of structur analysis, structur design, and structur testing. Structur design had been used upon past projects for module design and the technique had worked well.

Each engineer upon the project was equipped with an HP 9000 Series 300 workstation which was used for program unravelling and emulation. A network of workstations was created with undivided workstation dedicated as a central data base for configuration management (i.e., keeping track of all versions of our documentation and code) To enable us to use the structur analysis and structur design (SA/SD) systems effectively, HP Teamwork/SA was installed upon each workstation. This crops allowed us to produce all of the real-time structur analysis and structur design documentation for the HP 9145A firmware, and assisted in ensuring analysis and design consistency between the members of the team. Other software tools that we used included a code-efficient cros compiler from C to 68000 assembly language and a 68000 emulator.

This paper describes our experiences with applying SA/SD techniques and tools to the evolution of the HP 9145A firmware.

Real-time Structur Analysis

Structur analysis is a means that enables designers to partition a scheme into manageable component processes. It helps to identify the order requirements and functionality so that consideration about implementation details, of that kind as system architecture and module design, is delayed until necessary. This allows the designer to retain as many design options render free of access as possible. Structured analysis [1] has been luckily applied to business and commercial theorys where the emphasis is primarily in succession data flows and processes. In real-time a whole s in addition to data pours and processes, control and timing are also major considerations. For the HP 9145A firmware unravelling we used some parts of the structur analysis real-time extensions described in regards 2 and 3.

Real-time hypothesiss have two features that nonreal-time structur analysis cannot design One is the ability to distinguish between the grow of control signals such as interrupts, and simple data issue such as flags or values. In real-time structur analysis, information liquefy between processes is represented by the agency of control flows for control signals and circumstances and data flows for plain data (see Fig. 1) The check flows shown in Fig. 1 jaculate a signal to activate or deactivate a proces For example, when a user presse the Unload button onward the front panel, the state machine send outs the TapeUnloadCommand signal to activate the proces PrepareToUnload. The data comes represent information a process must retrieve from elsewhere in the order (e.g., a data store or another process) to perform its operation. For example, in Fig. 1 the proces Prepare ToUnload retrieves data about the CartridgeStatus from the Status data store.

The other deficiency of ordinary structur analysis is in modeling seriess of real-time operations. These are situations where timing or the order of responding to results and actions is very important. Starting a servo motor and waiting until it is up to spe before proceeding, or enabling DMA transfer of data to tape, are examples where timing and succession are critical. One way used in real-time structured analysis to mould sequence control is the state transition diagram (STD) State transition diagrams are used to archetype state machine behavior and to display how different system states are influenced through control signals. Fig. 2 exhibit tos the state transition diagram for the mould shown in Fig. 1. This state machine is designed to correspond to events such as Unload button compressed Self Test button pressed, cartridge inserted, and likewise on, and still read commands from the HP-IB.